1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a semiconductor memory device including a sense amplifier.
2. Description of the Related Art
A Dynamic Random Access Memory (DRAM) device is a typical volatile semiconductor memory device. A DRAM memory cell has a cell transistor and a cell capacitor. The cell transistor serves to select the cell capacitor, and the cell capacitor serves to store electric charges that correspond to data.
Since there is unintentional leakage of electric current in and out of the cell capacitors, the memory cell charges need to be periodically restored. This operation of restoring the charge in the cell capacitors is referred to as a refresh operation. Refresh operations require repeatedly performing active mode and precharge mode operations at predetermined periods. A more detailed description of refresh operations is as follows. In the active mode, as a memory cell is selected and a bit-line sense amplifier is enabled, the bit-line sense amplifier senses and amplifies data transferred from the selected memory cell and then returns the amplified data back to the memory cell. Then, in the precharge mode, the bit-line sense amplifier is disabled and the memory cells are unselected. This whole process allows the data stored in the memory cells to be maintained.
However, when current leakage increases, the length of time which memory cells may reliably maintain data that is stored in the cell capacitors is shortened. Therefore, it would be desirable to have new technologies to help reduce leakage current and improve data reliability.